About Neurophos

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape the future of computing!

Location: Austin, TX or Sunnyvale, CA. Full-time onsite position.

Reports To: Director of Silicon Photonics

FLSA Status: Exempt

Position Overview

Neurophos is looking for a Silicon Photonics Engineer to lead the development of the high-speed modulators that move data into the optical domain on our OPU platform, including the T100 optical AI inference chip. You will own modulator design from concept through tapeout and work closely with the test team to characterize and validate silicon. You will also drive R&D on advanced modulator architectures to keep bandwidth, energy per bit, footprint, and drive voltage in pace with product requirements.

Key Responsibilities

Lead high-speed silicon photonics development, focusing on high-speed modulators (e.g., carrier-depletion Mach-Zehnder, micro-ring/micro-disk, and traveling-wave designs).

Design and optimize modulators for EO bandwidth, VπL, insertion loss, extinction ratio, and energy per bit, using optical, electrical, and RF co-simulation.

Lead layout and tapeout of photonic test vehicles and product blocks in foundry PDKs, including DRC/LVS sign-off and design-for-test structures.

Define RF electrode, termination, and driver-interface requirements together with the electronic IC and packaging teams.

Support wafer- and die-level testing (small-signal EO S-parameters, eye diagrams, BER, DC/thermal tuning), and correlate measured results with models to improve the next design.

Research and develop advanced high-speed modulator concepts to meet product requirements.

Write design specs, tapeout reviews, and test reports, and present technical trade-offs to cross-functional stakeholders.

Qualifications

PhD in a relevant field, such as Electrical Engineering, Applied Physics, or Physics.

3 years of relevant working experience in high-speed silicon photonics, specifically high-speed modulator design.

Hands-on experience with photonic device simulation tools (e.g., Lumerical/Ansys, COMSOL, or equivalent) and RF/electromagnetic simulation of traveling-wave electrodes.

Experience creating photonic layouts and taping out in a silicon photonics foundry PDK (e.g., KLayout, gdsfactory, Cadence Virtuoso, or equivalent).

Working knowledge of high-speed characterization methods and instruments, such as VNAs, high-speed oscilloscopes, BERTs, and RF probe stations.

Solid understanding of the plasma dispersion effect, PN/PIN junction design, and the trade-offs among speed, loss, and drive voltage in silicon modulators.

Preferred Skills

5+ years of experience in high-speed silicon photonics.

Experience taking devices through the full design-to-tapeout-to-fabrication-to-testing cycle.

Experience with advanced EO modulator platforms (e.g., thin-film lithium niobate, BTO, or III-V/Si heterogeneous integration).

Experience co-designing modulators with CMOS/SiGe drivers, or with high-speed RF packaging and photonic-electronic co-integration.