About Bridge Neurotech

Bridge Neurotech is building a non-invasive functional ultrasound imaging (fUSI) platform with AI-based neural decoding for brain-computer interface applications. We are a seed-stage neurotechnology company developing technology that has the potential to transform how we interact with the human brain.

About the Role

As the Realtime Pipeline Lead, you will own one realtime path end to end: multi-Gbit/s RF data off an ultrasound probe through GPU beamforming, clutter filtering, and imaging preprocessing; ML preprocessing; neural decoder inference; and decoded output to a BCI application.

These components share GPU and memory, inside a latency budget tight enough for closed-loop decoding with deterministic tail latency. Today the pieces exist; the job is to make them one production system and to be accountable for it. As the owner of the realtime stack, you set its architecture, and you decide what to extend, replace, or push upstream (we build on open primitives like the Mach beamformer).

You define the model-serving contract with the ML/AI Lead, the probe data handoff with the Embedded Systems Engineer, the imaging pipeline with the Imaging Scientist, and the decoded-output interface with the Applications Engineer.

What You’ll Do

Own the end-to-end realtime path: raw RF data ingestion, beamforming, processing (e.g., clutter filtering), ML preprocessing, model inference, and decoded output.

Set the technical direction for the realtime stack and represent it in architecture decisions across the company.

Build the ML inference engine: model loading from artifacts, GPU memory residency, batching, TensorRT/ONNX or hand-built CUDA inference, and kernel-level integration with the upstream imaging compute.

Integrate, extend, and, where appropriate, contribute to GPU beamforming.

Hit and hold realtime throughput and latency targets at multi-Gbit/s ingest with deterministic tail latency suitable for closed-loop decoding.

Define and own the model serving contract with the ML/AI Lead and the path for model updates without service interruption.

Build the streaming and storage layer that serves raw and processed data to both offline training and realtime inference.

Collaborate with other team members to define the upstream interface to the device acquisition layer and the downstream interface to the BCI applications layer.

Build observability into every stage and develop benchmarks and regression tests that lock in both pipeline performance and inference correctness as the system evolves.

Who You Are

Required

Expert modern C++ and experience with CUDA and GPU kernels, with pipelines you wrote or substantially rewrote for signal-processing, imaging, or perception workloads in production.

You have taken trained PyTorch (or equivalent) models to GPU deployment under hard latency budgets, using TensorRT, ONNX Runtime, Triton or hand-built CUDA inference.

You have built and owned production realtime or HPC systems other engineers depended on, at multi-Gbit/s or equivalent data rates, and you were the person accountable when latency targets were missed.

Working fluency with cloud infrastructure: object storage and storage tiers, compute instances with GPUs, IAM, and the sync between an on-site acquisition system and cloud storage.

Strong data structures, algorithms and systems fundamentals: memory layout, host-device transfer, pinned memory, streams, concurrency.

Enough Python and PyTorch to read a model, profile it, and have an informed opinion about architecture trade-offs that affect latency.

BS/MS/PhD in computer science, electrical engineering or a related field, and 8+ years of experience, including ownership of a critical production system.

Nice to Have

Signal processing for imaging or RF: beamforming, FFTs, IQ demodulation, SVD-based clutter filtering, autocorrelation.

Functional ultrasound or another high-data-rate imaging modality.

Integrating ML inference with upstream realtime compute: shared GPU memory layouts, minimizing host–device round-trips.