Global · updated 22h ago
Architect Labs
- Open roles
- 16
- Remote anywhere
- 0
can apply
- Top teams
- ASIC 1 · Architecture 1
- Top locations
- United States 15 · India 1
Observed by alder · through 8 Nov
Is Architect Labs hiring?
Yes: Architect Labs has 16 open roles on its own job board. 0 opened in the last 30 days. Most are in ASIC (1), Architecture (1). Most roles are United States, India. Last change: 2026-11-02.
What teams is Architect Labs hiring for?
ASIC: 1 open roles; Architecture: 1 open roles.
Hiring pulse
Hiring pulse · Learning · 4/7
Open rolesRemovedobserved
Open roles
Member of Technical Staff - Microarchitect / RTL Design
Palo Alto; Bangalore, India6mo ago
Onsite · United States
| Special Projects Special Projects Architect Labs · Palo Alto | — | 6d | Onsite · United States |
| Member of Technical Staff - ML Research Member of Technical Staff - ML Research Architect Labs · Palo Alto PyTorchLLMsDistributed systems | — | 271d | Onsite · United States |
| Member of Technical Staff - Research Intern Member of Technical Staff - Research Intern Architect Labs · Palo Alto PythonPyTorchLLMs | — | 271d | Onsite · United States |
| Member of Technical Staff - Microarchitectural Validation Member of Technical Staff - Microarchitectural Validation Architect Labs · Palo Alto Node.jsPythonC++ | — | 97d | Onsite · United States |
| Member of Technical Staff - Software Member of Technical Staff - Software Architect Labs · Palo Alto TypeScriptPythonC++AWSGCPAzureKubernetesDocker | — | 167d | Onsite · United States |
| General Application General Application Architect Labs · Palo Alto | — | 206d | Onsite · United States |
| Member of Technical Staff - AI for Chip Design Member of Technical Staff - AI for Chip Design Architect Labs · Palo Alto TypeScriptPythonLLMs | — | 199d | Onsite · United States |
| Member of Technical Staff - Formal Methods Member of Technical Staff - Formal Methods Architect Labs · Palo Alto | — | 180d | Onsite · United States |
| Microarchitect / RTL Design - Interconnect & Fabric Microarchitect / RTL Design - Interconnect & Fabric Architect Labs · Palo Alto Node.js | — | 89d | Onsite · United States |
| Microarchitect / RTL Design - Memory Subsystem Microarchitect / RTL Design - Memory Subsystem Architect Labs · Palo Alto Node.js | — | 89d | Onsite · United States |
| Member of Technical Staff - Formal Verification Member of Technical Staff - Formal Verification Architect Labs · Palo Alto Python | — | 83d | Onsite · United States |
| Member of Technical Staff - Physical Design Member of Technical Staff - Physical Design Architect Labs · Palo Alto Python | — | 55d | Onsite · United States |
| Chief Architect Chief Architect Architect Labs · Palo Alto | — | 11d | Onsite · United States |
| Vice President of ASIC Engineering Vice President of ASIC Engineering Architect Labs · Palo Alto | — | 10d | Onsite · United States |
| Member of Technical Staff - Microarchitectural Validation Member of Technical Staff - Microarchitectural Validation Architect Labs · Bangalore, India Node.jsPythonC++ | — | 110d | Onsite · India |
| Member of Technical Staff - Microarchitect / RTL Design Member of Technical Staff - Microarchitect / RTL Design Architect Labs · Palo Alto; Bangalore, India Node.jsPython | — | 206d | Onsite · United States |
Pay & sponsorship
observed
0 of 16 roles post pay
No pay or sponsorship records yet
Signals
observed
Roles usually close inClose time · Learning · 0/10
Net roles · 7 daysVelocity · Learning · 3/7
New team signalNew teams · Learning · 2/37
Where they hire
United States15
India1
By team
ASIC1
Architecture1
Role mix
Software engineering2