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Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

What You’ll Learn

Project Overview: Research the AI system architecture up to the rack level, breaking the memory wall for long-horizon agents: next-generation memory hierarchies that hold more context without losing accuracy or speed.
Skills You’ll Learn:
Memory hierarchy design and optimizations for AI inference
Performance modeling and design-space exploration of AI systems
Characterization of agentic and long-context LLM workloads
Turning research into publications and future products

What You’ll Do

The Architecture Research Lab (ARL) is tackling two of the biggest challenges in AI today—memory bandwidth and communication bottlenecks. By leveraging Samsung’s world-leading memory technologies, we are developing next-generation AI systems that break through these limitations while improving developer productivity.

This internship explores how memory systems should evolve for agentic AI. AI agents work over long horizons, across many turns, and build up context faster than memory capacity and bandwidth grow. As a result, their accuracy and speed decline. You will research memory architectures and system optimizations that keep long-horizon inference accurate and efficient, evaluate them with performance models and accuracy studies, and turn the results into publications and into requirements for future memory products.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy

Reports to: Principal Engineer

Characterize LLM and agentic inference workloads (multi-turn sessions, long and growing context, reuse across requests) and derive their memory capacity, bandwidth and latency requirements.
Research memory hierarchies for AI inference that combine HBM, near-memory compute, emerging tiers such as High Bandwidth Flash, and host or CXL memory, including how model weights and KV cache are placed, moved, reused and compressed across them.
Propose new architectures and system optimizations, from hardware features to runtime and memory-management policies, that keep long-horizon agents accurate within memory limits.
Build and extend performance models and simulators, and run design-space explorations of different throughput, capacity and cost metrics.
Measure the accuracy impact of memory optimizations on long-context and agentic benchmarks with open models.
Drive the research from problem definition to results, working closely with architects, memory technologists and system-software researchers.
Publish results at top-tier venues, contribute invention disclosures, and help turn research into product directions.
Complete other responsibilities as assigned.

What You Bring

PhD student currently pursuing degree, 3+ years studying in Computer Science preferred
Must have at least 1 academic quarter/semester remaining
Strong background in AI System architecture and memory systems: memory hierarchy, DRAM/HBM, data movement.
Deep understanding of LLM and agentic inference (prefill and decode, KV cache, long-context workloads), and of how memory optimizations such as KV-cache compression or eviction affect model accuracy.
Experience in performance analysis and modeling of AI systems, including roofline analysis, building or extending simulators or analytical models to evaluate architecture ideas.