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Celero Communications, Inc.

Principal Analog Design Engineer

Vancouver, British Columbia, Canada; Irvine, CA; Ottawa, Canada; San Jose, CA; Vancouver, CanadaCanada
Principal · Analog Design
POSTED 17 AUG
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Role
84 days opentrue age
Posted 17 Aug
Pay
CAD 94k–CAD 201kno pay posted
Market p25–p75
CAD 94k–CAD 201k
Vancouver · n=70 · 365d to 6 Nov
CompanyCelero Communications, Inc. →
26open roles
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Are you an Analog Design Engineer passionate about building the high-speed interconnect technology powering the next generation of AI? Join our fast-growing semiconductor startup and help develop disruptive mixed-signal solutions that enable tomorrow's AI infrastructure. We are seeking experienced Analog Design Engineers to architect, design, and deliver high-performance analog and mixed-signal circuits for next-generation transceivers and other critical high-speed functions. This is an opportunity to work alongside a world-class engineering team, tackle challenging design problems in advanced process technologies, and make a direct impact on innovative products from architecture through silicon.

Locations: Irvine, CA (HQ) | San Jose, CA | Vancouver, BC | Ottawa, ON

What You Will Do

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)

• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)

• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)

• New techniques for the development of next generation optical transceiver

• Design of custom passive components, from concept to silicon implementation

• Supervise analog layouts within advanced process nodes

• System verification and circuit design spec creation

• Silicon bring-up, debug and support

• Team communication and documentation

What You Will Bring

• Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience

• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks

• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must

• Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)

• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus

• Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design

• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus

• Strong communication and documentation skills

Source · Celero Communications, Inc.First seen 4 NovOriginal ↗