Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview

As a Principal Engineer on the Scorpio Product Applications team, you will help customers and internal teams deploy high-performance PCIe fabric solutions for rack-scale AI infrastructure. You will translate complex system requirements into practical architectures, lead platform bring-up, and guide the integration of Scorpio switches across demanding CPU, GPU, NIC, storage, and accelerator designs.

This role connects product strategy, firmware, and real-world system behavior. You will work across hardware, firmware, validation, and customer-facing teams to solve interoperability challenges, accelerate adoption, and shape the next generation of PCIe Gen 6/Gen 7 connectivity. Your work will directly influence how AI systems scale using purpose-built fabrics, UALink, and UCIe.

Key Responsibilities

Product Applications and Customer Enablement
Lead technical engagements with customers and ecosystem partners to define Scorpio-based PCIe Firmware architectures and deployment requirements.
Develop reference designs, application guidance, technical presentations, and system-level collateral that accelerate customer adoption.
Translate customer use cases into clear Scorpio Firmware requirements, integration plans, and prioritized technical actions.
PCIe and Firmware Bring-Up
Drive system bring-up, debug, and interoperability across PCIe hosts, BMCs, GPUs, NICs, storage devices, and other high-performance endpoints.
Partner with firmware teams to define, implement, and validate device configuration, traffic routing, boot flows, telemetry, recovery mechanisms, and field-debug capabilities.
Analyze link training, enumeration, performance, error handling, data traffic and system stability issues using protocol traces, logs, and lab instrumentation.
Build and maintain firmware, validation, and automation workflows that improve debug efficiency and product readiness.
Cross-Functional Product Leadership
Partner with firmware, architecture, design, validation, and FAE teams to resolve complex issues from prototype through mass production.
Lead root-cause analysis, communicate risks and recommendations, and drive issues to closure with clear ownership and measurable outcomes.
Influence customer decisions on product enhancements and ecosystem interoperability plans for next-generation AI infrastructure connectivity.

Basic Qualifications

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
8–12 years of experience in product applications, firmware development, systems engineering, platform validation, or a related semiconductor domain.
Strong understanding of PCIe Switch Firmware, PCIe architecture (including link training, enumeration, configuration space, error handling, performance, and system interoperability).
Experience with firmware development or debug, including the ability to read code, interpret logs, and collaborate effectively with firmware developers.
Hands-on experience with system bring-up, lab debug, protocol analysis, and root-cause investigation across complex hardware and software stacks.
Strong written and verbal communication skills, with the ability to explain technical issues to both engineering teams and customers.