About the Role

Join a team developing thermodynamic computing chips as a Senior Analog/Mixed Signal Engineer. You will design circuits across analog, mixed-signal, and probabilistic computing domains, helping move new chip architectures from concept to silicon.

What You'll Do

Design analog and mixed-signal circuit blocks, including ADCs, PLLs, band gaps, regulators, oscillators, high-speed dividers, and SerDes.

Own block-level design across chips, from architecture and schematic development through layout and tape-out verification.

Perform hands-on layout and simulations in Cadence, including parasitic extraction, Monte Carlo, and corner analysis.

Support laboratory testing and validation using signal generators, spectrum analyzers, and oscilloscopes.

Collaborate with IC, systems, physics, and algorithms teams to develop thermodynamic sampling units.

What We're Looking For

Three to six years of experience in CMOS analog and mixed-signal IC design, with an MS or PhD in electrical engineering focused on the field.

Experience designing one or more of ADCs, PLLs, oscillators, regulators, or high-speed SerDes, and working across multiple circuit types.

Multiple tape-out experiences, ideally using FinFET or 28nm/65nm processes.

Strong mixed-signal design skills, hands-on layout experience, and familiarity with Cadence Virtuoso, PEX, Monte Carlo simulation, and corner analysis.

Ability to perform small-signal and feedback analysis, and willingness to take on practical design and lab tasks beyond a narrow specialty.

Compensation & Benefits

Base salary: $160,000 to $300,000 annually. Visa sponsorship is available.

Location

Hybrid, with three days per week on-site in Boston, Massachusetts.