About Neurophos

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape the future of computing!

Location: Austin, TX. Full-time onsite position.

Reports To: VP of VLSI

FLSA Status: Exempt

Position Overview

Neurophos is seeking a Director of Analog and Mixed-Signal IC Design to build and lead the team responsible for the electronic circuits that drive, sense, and connect our optical processing unit. Our OPU depends on dense, energy-efficient electronics operating in close partnership with photonics: high-speed data converters and drivers that move information into and out of the optical domain, low-power analog front ends that read out the photonic signals, clocking and power management that keep the system stable, and high-bandwidth links that connect it to the rest of the data center.

In this role, you will build and run the analog, mixed-signal, and mmWave design organization and own its silicon from architecture through volume production. You will set technical direction, lead and grow a team of senior designers, and own delivery of silicon that meets performance, power, schedule, and yield targets. We are looking for a highly technical leader who has taken multiple products from concept to high-volume manufacturing and knows what it takes to design for first-pass success and production robustness.

Key Responsibilities

Build, lead, and mentor a high-performing team of analog, mixed-signal, RF/mmWave, and layout engineers; recruit top talent and foster a culture of technical rigor, ownership, and collaboration.

Define the architecture and specifications for analog and mixed-signal IP, including high-speed ADCs and DACs, modulator drivers, transimpedance amplifiers and analog front ends, PLLs and clock generation/distribution, SerDes and high-speed I/O, voltage references, and on-chip regulators.

Own silicon through the full lifecycle: specification, schematic and layout, verification, tape-out, silicon bring-up, characterization, qualification, and production release.

Represent analog within the company. Negotiate specifications, schedules, and budgets the team can meet. Keep the team informed of company priorities and decisions, and report status, risks, and mitigation plans to the VP of VLSI.

Guide the design of low-power precision analog blocks and high-speed mixed-signal circuits, driving aggressive energy-per-operation targets across the OPU system.

Collaborate with the photonics team and oversee the development of millimeter-wave circuits and interfaces, including transceivers, LNAs, PAs, mixers, VCOs, and high-frequency passives, with a focus on EM modeling and package co-design.

Maintain disciplined design data management. Establish and enforce robust design methodologies: PVT and Monte Carlo analysis, reliability (EM/IR, aging, ESD, latch-up), mismatch and noise budgeting, and rigorous design reviews at every milestone.