About Neurophos

The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.

Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.

We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.

Join us and shape the future of computing!

Location: Austin, TX. Full-time onsite position.

Reports To: Chief Systems Engineer

FLSA Status: Exempt

Position Overview

We are seeking a highly skilled Systems Engineer to own the quantitative, end-to-end performance model of our optical vector-matrix multiplication (OVMM) engine. This role is the technical center of Systems Engineering's performance-modeling focus area: you will lead the end-to-end modeling, analysis, and architectural definition of high-speed communication and signal-processing systems. In this role, you will build and maintain the link and power budgets; quantify impairments and non-idealities across the optical, analog, and digital domains; develop mathematical and behavioral models; define the hardware and algorithmic techniques required to meet aggressive system-level performance targets; and determine how accuracy, throughput, and power trade against one another as the architecture evolves.

You will spend the bulk of your time running system-level simulations, translating them into defensible allocations that the rest of the organization can design against. If you have deep communication-theory and signal-processing intuition, are fluent turning a signal chain into a quantitative model, and want to be the person who can answer "where does the system actually lose its margin," this role will let you define the performance envelope of a first-of-its-kind computing platform.

Key Responsibilities

Primary Responsibilities

Link & Power Budget Ownership: Own and maintain the end-to-end optical and electrical link/power budget for the OVMM signal path, keeping it synchronized with the as-designed and as-measured hardware as the architecture evolves.

Signal-Path Modeling: Build and maintain the reference behavioral model of the full TX-channel-RX signal path, capturing optical, analog, quantization, and algorithmic effects with the fidelity needed for architecture trades and requirements allocation.

Accuracy & Performance Allocation: Allocate NMSE/SNR/SNDR targets across optics, analog, quantization, and algorithmic domains, and update those allocations as component and architecture choices change.

Impairment Analysis: Characterize and model optical, analog, and digital impairments, including noise, distortion, jitter, quantization effects, crosstalk, mismatch, and nonlinearity, and quantify their impact on system-level accuracy.

Throughput & Efficiency Trade Studies: Analyze the impact of channel count, TX/RX configuration, and architectural changes on TOPS, TOPS/W, and latency, and determine whether a proposed architectural change is worth its additional power or complexity.

Monte Carlo & Time-Domain Simulation: Develop and run statistical (Monte Carlo, corner) and time-domain simulations to quantify design margin and manufacturing robustness.